Reference generators are important components in analog-to-digital converters (ADC), especially for high-speed, high-resolution ADCs. They generate and maintain a desired constant reference voltage used by the ADC to perform accurate analog to digital conversions. In ADCs that use switched capacitor circuit techniques, a reference voltage is typically coupled to conversion circuits through switched capacitor loads.
Because the generated reference voltage is directly involved in the analog-to-digital calculation, errors in the reference will lead to performance degradation of the ADC. Such performance degradation can include a reduction in the Signal-to-Noise Ratio (SNR) or a reduction in the Equivalent Number of Bits (ENOB). Further sources of error and performance degradation include insufficient settling error after switching glitches and supply noise disturbance, etc. Poor power supply noise rejection exacerbates the effects of supply noise disturbance.
One way to improve the power supply rejection ratio (PSRR) of a reference generator is to use large decoupling capacitors and/or adopt a reference generator using large off-chip capacitors. Such techniques, however, can come at the expense of increased die size, additional pin count, increased circuit complexity, and additional off-chip components.